Senior CAD Infrastructure Engineer – Join L&T Semiconductor Technologies, Bengaluru

Job Description

Summary

Are you an experienced CAD Infrastructure Engineer looking to work on high-performance systems that support next-gen semiconductor design? L&T Semiconductor Technologies Limited (LTST) in Bengaluru is hiring a Senior CAD Infrastructure Engineer to lead the development and optimization of scalable, secure, and efficient EDA tool infrastructures and CAD environments for complex chip design workflows.

In this high-impact role, you’ll collaborate with design engineers, IT, HPC teams, and EDA vendors to drive innovation, automation, and performance tuning. With 6–9 years of experience, this opportunity is perfect for professionals with a strong background in CAD system architecture, EDA tool management, and job scheduling environments (LSF).

Job Details at a Glance

Key Responsibilities

As a Senior CAD Infrastructure Engineer, your core responsibilities will include:

• Architect, deploy, and manage a high-performance, scalable CAD infrastructure to support semiconductor design teams.
• Collaborate with R&D, IT, and HPC teams to understand chip design requirements and translate them into efficient CAD solutions.
• Automate workflows, job scheduling, and resource management using scripting tools.
• Ensure the reliability, availability, and performance of the CAD environment.
• Integrate CAD systems with existing enterprise infrastructure.
• Troubleshoot and resolve technical issues related to CAD/EDA tools and systems.
• Optimize existing job scheduling tools like LSF to enhance performance and support R&D workflows.
• Evaluate, install, and manage new EDA tools, focusing on scalability, performance, and security.
• Maintain detailed documentation for CAD tools, systems, and processes.
• Deliver training and best practice guidance to design teams.
• Monitor system performance, resource utilization, and recommend data-driven improvements.
• Ensure compliance with CAD standards, documentation, and operational procedures.
• Work closely with EDA vendors to improve tool performance and manage licenses.
• Track team metrics, customer satisfaction, and continuously improve support processes.
• Mentor junior engineers and foster a high-performance, learning-focused team environment.

Required Skills & Tools

• Strong understanding of CAD/EDA toolchains for chip design
• Expertise in job scheduling tools such as LSF
• Experience with Linux-based infrastructure management
• Scripting skills for automation (Python, Bash, or similar)
• CAD system integration and performance tuning
• Familiarity with semiconductor design workflows and challenges
• Strong troubleshooting and debugging skills
• Ability to document, train, and mentor effectively

Preferred Experience

• Previous experience managing CAD environments for large-scale chip development
• Working knowledge of HPC clusters and datacenter operations
• Experience with tool licensing optimization
• Ability to work cross-functionally across IT, R&D, and vendor teams
• Prior engagement with EDA vendors and understanding of licensing models
• Leadership in developing support tools and troubleshooting automation

Why Join L&T Semiconductor Technologies?

• Be part of India’s semiconductor growth story
• Collaborate on cutting-edge chip design infrastructure
• Work with a diverse and expert team of engineers and innovators
• Excellent career growth in a high-impact engineering leadership role
• Located in Bengaluru, a global tech innovation hub

Apply Now

Looking to elevate your CAD infrastructure career?

👉 Click here to apply via the official L&T Careers Page (Replace with actual link)

Apply before 18 February 2026 to join a leading semiconductor engineering team committed to innovation and excellence.